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<body>
<div class="center">
<p><strong><span class="smallcaps">Alexander
Jin-Scheltgen</span></strong><br />
  <span>403-616-7941</span>
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<a href="mailto:ajinsche@uwaterloo.ca"><u> ajinsche@uwaterloo.ca</u></a>
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<a
href="https://www.linkedin.com/in/alexander-jin-scheltgen-916121318/"><u> LinkedIn</u></a></p>
</div>
<h1 id="technical-skills"><strong>TECHNICAL SKILLS</strong></h1>
<div class="itemize">
<p><span> <strong>Software</strong><span>: GNU Radio, Altium Designer,
LTSpice, Quartus, STM32CubeIDE, COMSOL</span><br />
<strong>Languages</strong><span>: Python, C, C++, MATLAB, VHDL, Verilog,
SCPI, VBScript</span><br />
<strong>Tools</strong><span>: Soldering, Digital Multimeter,
Oscilloscope, Function Generator, Spectrum Analyzer, VNA,
Soldering</span>  </span></p>
</div>
<h1 id="experience"><strong>EXPERIENCE</strong></h1>
<ul>
<li><table>
<tbody>
<tr>
<td style="text-align: left;"><strong><u>Satellite Communications
R&amp;D Intern</u></strong></td>
<td style="text-align: right;">May 2026 – September 2026</td>
</tr>
<tr>
<td style="text-align: left;"><em>Galaxia &amp; Dalhousie
University</em></td>
<td style="text-align: right;"><em>Halifax, NS</em></td>
</tr>
</tbody>
</table>
<ul>
<li><p><span> <span>Designed a 6-layer carrier board in Altium </span>
</span></p></li>
<li><p><span> <span>Simulated inter-satellite links and calculated link
margins based on TLE datasets </span> </span></p></li>
<li><p><span> <span>Led bring-up and debug of custom Flying Probe
interface boards, validating <strong>JTAG</strong> and <strong>power
signal integrity</strong> to improve connectivity with automated test
equipment. </span> </span></p></li>
</ul></li>
<li><table>
<tbody>
<tr>
<td style="text-align: left;"><strong><u>Satellite EGSE Engineering
Student</u></strong></td>
<td style="text-align: right;">September 2025 – December 2025</td>
</tr>
<tr>
<td style="text-align: left;"><em>MDA Space</em></td>
<td style="text-align: right;"><em>Ste-Anne-de-Bellevue, QC</em></td>
</tr>
</tbody>
</table>
<ul>
<li><p><span> <span>Automated and optimized Flying Probe test workflows
using <strong>VBScript</strong> and <strong>Python</strong> to validate
electrical characteristics, leveraging SCPI-controlled instrumentation
to streamline test execution of flight hardware </span> </span></p></li>
<li><p><span> <span>Designed optimized power harnesses and connectors
for reliable power delivery during lab validation. </span>
</span></p></li>
<li><p><span> <span>Led bring-up and debug of custom Flying Probe
interface boards, validating <strong>JTAG</strong> and <strong>power
signal integrity</strong> to improve connectivity with automated test
equipment. </span> </span></p></li>
</ul></li>
<li><table>
<tbody>
<tr>
<td style="text-align: left;"><strong><u>Electrical Engineering
Intern</u></strong></td>
<td style="text-align: right;">January 2025 – May 2025</td>
</tr>
<tr>
<td style="text-align: left;"><em>Kornak Technologies Inc.</em></td>
<td style="text-align: right;"><em>Calgary, AB</em></td>
</tr>
</tbody>
</table>
<ul>
<li><p><span> <span>Developed and optimized firmware for a Mars Clock
project on the <strong>AVR ATmega328-PU</strong> in <strong>Embedded
C</strong>, utilizing <strong>Microchip Studios</strong> and the
<strong>Pololu AVR Programmer</strong> for efficient implementation.
</span> </span></p></li>
<li><p><span> <span>Enhanced system reliability by developing test cases
to debug <strong>UART</strong> and <strong>SPI</strong> interface
connections, ensuring accurate transmission and reception. </span>
</span></p></li>
</ul></li>
</ul>
<h1 id="projects"><strong>PROJECTS</strong></h1>
<ul>
<li><table>
<tbody>
<tr>
<td style="text-align: left;"><strong><u>UW Formula Electric Radio
Subsystem</u></strong>
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<em>Altium, LTSpice, QucsStudio</em></td>
<td style="text-align: right;">February 2026 – Present</td>
</tr>
</tbody>
</table>
<ul>
<li><p><span> <span>Leading ongoing R&amp;D for the telemetry and radio
system for driver-pit voice-communication and monitoring. </span>
</span></p></li>
<li><p><span> <span>Designed 4-layer RF PCB for on-car module around
<strong>CC1101 transceiver</strong> and <strong>CC1190
range-extender</strong> for <strong>915MHz ISM band</strong>, including
balun/matching network, audio front-end, and <strong>SMA</strong>,
<strong>I2C</strong>, and <strong>SPI</strong> interfaces </span>
</span></p></li>
<li><p><span> <span>Simulated RF front-end and audio/telemetry chains in
<strong>LTspice/Qucs</strong> to verify gain, bandwidth, and stability.
</span> </span></p></li>
<li><p><span> <span>Integrated the RF link with the car’s <strong>CAN
bus</strong> to transmit key metrics (currents, temperatures,
acceleration) at up to <strong>10–50 kbps</strong> over <strong>2km
line-of-sight</strong>. </span> </span></p></li>
</ul></li>
<li><table>
<tbody>
<tr>
<td style="text-align: left;"><strong><u>QRM Eliminator</u></strong>
<math display="inline" xmlns="http://www.w3.org/1998/Math/MathML"><semantics><mo stretchy="false" form="prefix">|</mo><annotation encoding="application/x-tex">|</annotation></semantics></math>
<em>Altium, LTSpice, MATLAB</em></td>
<td style="text-align: right;">November 2025 – December 2025</td>
</tr>
</tbody>
</table>
<ul>
<li><p><span> <span>Designed an analog QRM eliminator in
<strong>Altium</strong> with adjustable phase shift and attenuation to
suppress local interference while preserving desired signals in an
amateur radio bench transceiver setup. </span> </span></p></li>
<li><p><span> <span>Implemented PTT-based bypass control to protect
sensitive analog components during high-power transmission. </span>
</span></p></li>
<li><p><span> <span>Simulated circuitry in <strong>LTSpice</strong> to
validate gain, phase response, and stability across VHF frequencies.
</span> </span></p></li>
<li><p><span> <span>Analyzed interference scenarios in
<strong>MATLAB</strong> by sweeping phase and attenuation parameters to
identify cancellation regions, improving interference suppression.
</span> </span></p></li>
</ul></li>
<li><table>
<tbody>
<tr>
<td style="text-align: left;"><p><strong><u>Bench Power
Supply</u></strong></p>
<p><math display="inline" xmlns="http://www.w3.org/1998/Math/MathML"><semantics><mo stretchy="false" form="prefix">|</mo><annotation encoding="application/x-tex">|</annotation></semantics></math>
<em>Altium, LTSpice</em></p></td>
<td style="text-align: right;">April 2025 – May 2025</td>
</tr>
</tbody>
</table>
<ul>
<li><p><span> <span>Designed a <strong>0-24V regulated variable linear
power supply</strong> which safely converts AC wall voltage to DC.
</span> </span></p></li>
<li><p><span> <span>Modeled the <strong>schematic</strong> and created a
<strong>PCB</strong> using <strong>Altium</strong>, simulating different
test conditions in <strong>LTSpice</strong> to ensure intended operation
and optimized design to reduce noise. </span> </span></p></li>
<li><p><span> <span>Integrated a voltmeter, ammeter, current and voltage
control, and current limiting to validate safe operation. </span>
</span></p></li>
</ul></li>
</ul>
<h1 id="education"><strong>EDUCATION</strong></h1>
<ul>
<li><table>
<tbody>
<tr>
<td style="text-align: left;"><strong>University of
Waterloo</strong></td>
<td style="text-align: right;">Waterloo, ON</td>
</tr>
<tr>
<td style="text-align: left;"><em><strong>Electrical Engineering,
BASc</strong></em></td>
<td style="text-align: right;"><em>September 2024 – May 2029</em></td>
</tr>
</tbody>
</table></li>
</ul>
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